Signal Integrity and PCB layout considerations for DDR2-800 Mb/s and DDR3 Memories
By Dr. Syed Bokhari, Chris Brennan, Cristian Tudor, Eric Schroeter and Heike Wunschmann

An award-winning paper that addresses the challenge of meeting Signal Integrity (SI) and Power Integrity (PI) requirements of Printed Circuit Boards (PCBs) containing Double Data Rate 2 (DDR2) memories. The emphasis is on low layer count PCBs, typically 4-6 layers using conventional technology. Some design guidelines have been provided.

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